Brazil has shown increasing and strategic involvement with the open-standard RISC-V instruction set architecture (ISA).In recent years, particularly between 2023 and 2024, the country has intensified its actions, consolidating its position as a relevant player on the global stage—especially in Latin America. This movement reflects a deliberate policy to foster innovation in semiconductors and pursue greater technological autonomy.

RISC-V Brazil 2025 aims to bring together the community committed to making Brazil an independent nation in the development of essential technologies such as semiconductors, processors using the open RISC-V standard, high-performance computing (HPC), and Artificial Intelligence.

The open RISC-V standard, whose specification is governed by RISC-V International, headquartered in Zurich, Switzerland, is recognized for its flexibility, scalability, and neutrality. Its adoption has been growing exponentially, with projections indicating it may reach 25% market share across all segments by 2030.

RISC-V Brazil 2025 will feature the participation of professionals from both local and international markets, as well as representatives from academia, research institutes, associations, and companies—both domestic and foreign.

Date: July 4, 2025 

Time: 9:00 AM – 6:00 PM (Brasília Time)

Location: Instituto de Pesquisas Eldorado, Campinas, São Paulo

Preliminary Agenda:

Opening Ceremony, Brazilian Minister of Science and Technology, Eldorado Institute, RISC-V International

Brazilian Strategy on Semiconductors, HPC, and AI, Alessandro Campos, General Coordinator of Semiconductor Technologies

RISC-V International, Andrea Gallo, CEO

Ventana Micro Systems, Balaji Baktha, CEO

VRULL GmbH, Philipp Tomsich, Chief Technologist

InspireSemi, Doug Norton, CMO; Alex Gray, CTO

DeepComputing, Yuning Liang, CEO

OpenChip, Ignacio Astilleros Díez, Chief Strategy Officer

Chipus, Murilo Pessatti, CEO

ChipInventor, Rafael Aroca, Innovation Manager

Red Hat/Fedora efforts on RISC-V, Klaus Kiwi, Senior Manager

HwIT, Juliano Oliveira, CTO

Panels: 

Panel I: Semiconductors, Computer Architecture, and RISC-V

Panel II: RISC-V in Strategic Sectors – Aerospace and Energy